With high integration and large capacity of a Large Scale Integration (LSI), a circuit dimension required for a semiconductor element becomes increasingly narrowed. For example, a pattern having a line width of several tens of nanometers is required to be formed in the latest typical logic device.
It is necessary to improve a production yield of the expensive LSI in a production process. In the semiconductor element, during a production process, an original design pattern (that is, a mask or a reticle, hereinafter collectively referred to as a mask) in which a circuit pattern is formed is exposed and transferred onto a wafer by a reduction projection exposure apparatus called a stepper or a scanner. A shape defect of a mask pattern can be cited as a large factor that reduces a production yield of the semiconductor element.
The finer the dimensions of an LSI pattern formed on the wafer becomes, the smaller the shape defect of the mask pattern becomes. As fluctuations of various process conditions are absorbed by enhancing dimensional accuracy of the mask, it is necessary to defect the defect of the extremely small pattern in a mask inspection. At this point, it is also necessary to determine the defect in consideration of the fluctuation in line width dimension or position shift amount of the pattern in a mask surface. For example, Japanese Patent No. 4236825 discloses an inspection apparatus that can detect the fine defect in the mask.
Examples of defect detection techniques include a die-to-database comparison method and a die-to-die comparison method. In the die-to-database comparison method, a reference image generated from design pattern data used in mask production and an optical image of the actual pattern in the mask are compared to each other. In the die-to-die comparison method, in the case that multiple chips having identical pattern configuration are disposed in a part or the whole of the identical mask, the optical images having the identical pattern in chips of the different masks are compared to each other.
A cell comparison method can also be cited as another defect detection technique. The cell comparison method is effectively used in the case that a repetitive pattern called a cell exists in the mask. In the die-to-die comparison method, the chips repetitively formed in the mask are compared to each other. On the other hand, in the cell comparison method, the repetitive patterns such as memory mats, namely, the cells are compared to each other in one chip. For example, the defect is inspected by the cell comparison method in a memory cell group of a DRAM (Dynamic Random Access Memory) element in which the repetitive pattern is formed. On the other hand, a logic element in which the repetitive pattern does not exist is inspected by the die-to-die comparison method in which the pattern of the logic element is compared to the pattern of a dummy logic element in an inspection dummy pattern provided at a predetermined position in the mask. Nowadays, with increasing demand for an embedded memory in logic, sometimes both the die-to-die comparison method and the cell comparison method are performed in a one-time inspection process (for example, see Japanese Patent No. 4564768).
The conventional mask inspection is aimed at the detection of the shape defect of the pattern, and a defect determination algorithm suitable for the detection of the shape defect of the pattern and a defect recording method are devised. In the mask inspection apparatus, a function of detecting the defect caused by the fluctuation in line width of the pattern is improved in order to meet a challenge of a lack of an LSI production margin caused by the fluctuation in line width. However, in a contemporary mask pattern, the shape defect or the dimension of the defect determined to be the cause of the fluctuation in line width becomes substantially equal to the fluctuation in line width (line width distribution) in the whole surface of the mask. Therefore, the number of detected defects becomes large.
In a process of generating the reference image in the die-to-database comparison method, filtering the optical image of a typical pattern position in the mask, namely, the learning process of a filter coefficient is performed to the design pattern data, whereby the reference image becomes the pattern image having a line width tendency imitating the pattern line width of a region where the learning process is performed. Therefore, the line width dimension has a distribution in the mask even in the die-to-database comparison method, and the optical image and the reference image are compared to each other with a line width bias (deviation) of the pattern in inspecting the region having the pattern line width different from the pattern line width of the region where the learning process is performed. As a result, the shape defect to be detected or the fluctuation in line width cannot be detected, or the shape and line width that do not need the detection is detected as the defect.
Additionally, in the die-to-die comparison method, the patterns having the line width bias (deviation) are compared to each other when the chips in the regions having the different line widths are compared to each other. Accordingly, the defect to be detected cannot be detected, or the shape and line width that do not need the detection is detected as the defect.
An object of the invention is to provide an inspection method, able to reduce the detection of the unnecessary defect while detecting the defect to be detected.
Other challenges and advantages of the present invention are apparent from the following description.